A 25-µs/Inf Event-Driven Graph Neural Network Processor with Spatiotemporal Caching and Spline Convolution for Ultra-Low-Latency AI at the Edge
Student Contest:
No
Affiliation Type:
Academia
Keywords:
Low latency, graph neural networks (GNNs), event-based computing, digital AI processors.
Abstract:
Dynamic-vision-sensor (DVS) cameras generate events on a per-pixel basis with a µs-level temporal resolution, calling for new algorithm-hardware co-design approaches compared to standard frame-based vision. While event-driven graph neural networks (EV-GNNs) emerge as a promising algorithmic solution, they raise new HW challenges by mixing dense-regular compute operations and sparse-irregular memory accesses. We present ETHEREAL, the first EV-GNN accelerator that scales to 640×480 resolutions, thanks to a neighbor-parallel spline convolution engine and a 2D/3D-split memory hierarchy with a novel region-of-interest spatiotemporal caching mechanism. Measurement results demonstrate end-to-end inference with 25.6µs latency and 1.7µJ energy per event on state-of-the-art workloads such as DAGr-GNN, a 10-to-1000× improvement over prior art.
