Information for Paper ID 2491
Paper Information:
Paper Title: Efficient and Agile ECC Acceleration: A Hardware/Software Co-Design with Automated Compilation 
Student Contest: Yes 
Affiliation Type: Academia 
Keywords: Elliptic Curve Cryptography (ECC), Hardware Acceleration, Automated Compilation, Intelligent Transport Systems 
Abstract: Elliptic Curve Cryptography (ECC) is a widely adopted public-key cryptosystem that ensures data integrity and authentication, particularly in Intelligent Transport Systems (ITS). In ITS, vehicles communicate via vehicle-to-vehicle (V2V) protocols, which require ECC accelerators to deliver low-latency responses, high throughput, and agile programmability. However, existing solutions often fail to balance performance and elliptic curve versatility, and they typically lack automated tools for agile task deployment. To address these challenges, this paper presents a general modular multiplier optimized for specific elliptic curves, namely SM2, NIST P256r1 and Secp256k1, to reconcile performance with modulus generality. Furthermore, an automated compiler is implemented for Application-Specific Instruction-set Processor (ASIP) tailored for ECC acceleration, which translates high-level mathematical expressions into executable instructions. Experimental results on FPGA show that our ECC accelerator achieves a speedup of 1.28x-4.1x for point multiplication (PM) and 1.1x-6x for double PM across specific curves, while fully meets V2V standards via its automated compilation framework. 
Track ID: 2.6 
Track Name: Hardware Security for Internet-of-Things, Cyber-Physical Systems 
Final Decision: Accept as Poster 
Session Name: Hardware Security for Internet-of-Things, Cyber-Physical Systems II (Poster) 
Author Questions:
TCAS: No
Theme Information:
Selected Theme(s):
Security & Trust in Circuits & Systems