New Power Device Designs and Gate Control Method Session
Session Type: Lecture
Session Code: HV-1
Location: Lecture Room
Date & Time: Monday June 02, 2025 (10:50 - 12:30)
Chair: Wentao Yang,
Karthik Padmanabhan

 

    Papers are listed in the order they will be presented.

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My Sched		Paper
Id		TopicTitle/Author
5059 1 Shallow Active Trench CSTBT™ with Low Switching Loss for 6.5kV Class
Kakeru Otsuka, Ayanori Gatto, Koji Tanaka, Shinya Soneda
5220 1 Influence of IGBT Switching Behavior on Conducted and Radiated Emissions Below 30 MHz
Yosuke Sakurai, Yasutoshi Yoshioka, Marco A. Azpúrua, Jordi Solé-Lloveras, Rik W. De Doncker
5060 1 First Demonstration of 6.5kV Fully Scaled IGBT with Ultra-Shallow Edge Termination (USET)
Takuya Saraya, Kiyoshi Takeuchi, Kazuo Itou, Toshihiko Takakura, Munetoshi Fukui, Shinichi Suzuki, Hiroyuki Takase, W...
5163 1 A Novel 4.5 kV Nonlatching IGCT for Turn-on di/dt Controllability Without a Clamp Circuit
Gurunath Vishwamitra Yoganath, Jan Fuhrmann, Tobias Wikström, Hans-Günter Eckel
5051 1 New Bidirectional Asymmetric High Voltage TVS (Transient Voltage Suppressor) Device
Boris Rosensaft, Xingchong Gu, Martin Schulz