Low Voltage Power Devices 2 Session
Session Type: Poster
Session Code: LVT-P
Location: Poster 1
Date & Time: Tuesday June 03, 2025 (16:10 - 18:00)
Chair: Atsushi Sakai,
Yuichi Onozawa

 

   

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Id		TopicTitle/Author
5023 2 A Novel Split Contact Field Plate LDMOS with a Floating Gate for Hot Carrier Degradation Improvement
Qiao Teng, Yongyu Wu, Kai Xu, Dawei Gao
5098 2 Novel Optimization Method of Multi-Devices Using TCAD Driven Machine Learning in BCD Process
Junhyeok Kim, Kyuyeop Lee, Yunjun Nam, Joohyung Yoo, Juwon Park, Dawon Jeong, Jaehyun Yoo, Yonghee Park, Dae Sin Kim
5114 2 Chip Layout Optimization of Trench Length and the Upper Electrode Contact in Trench Field Plate MOSFET
Casey Clendennen, Tomoaki Shinoda, Shinpei Onishi, Hajime Kataoka, Masaki Nagata
5137 2 Irradiation Hardening of SGT Based on Combined IPO Structure and Mechanism Modeling of Leakage Current Optimization
Junyan Zhu, Haonan Liu, Jun Ye, Xuan Xiao, Ruihan Gao, Junfeng Yu, Xiaodong Yang, Zhuang Wang, Chunlei Wu, Weiye Mo, ...
5156 2 Integrated Fast-Recovery SGT-SBR Devices with Majority Carrier Modulation During Wide Temperature Range
Jun Ye, Haonan Liu, Ruihan Gao, Xuan Xiao, Junyan Zhu, Weiye Mo, Yang Song, Xiaodong Yang, Zhuang Wang, Jiao Liang, H...
5166 2 BCD HVpMOS with Double-Functional-RESURF to Improve HCI Reliability
Tomohiro Imai, Atsushi Sakai, Zen Inoue
5168 2 Novel Multistack Floating Field Plate MOSFET and Image Clustering-Based Design Analysis
Hiro Gangi, Yasunori Taguchi, Kentaro Takagi, Kouta Nakata, Kairu Yoshida, Taichi Fukuda, Hiroki Nemoto, Shotaro Baba...
5177 2 Design and Performance Enhancement of Integrated Schottky Contact in Low-Voltage LDMOS on 55nm BCD Platform
Dingxiang Ma, Yuanqing Ye, Yangjie Liao, Jiawei Wang, Fanyi Zeng, Bo Zhang, Ming Qiao
5219 2 High Reliability Tri-Zone Heterogeneous Charge Balanced SJ-LDMOS with Novel Silicon Rich Oxide and its Experimental Verification
Teng Liu, Hao Wang, Wentong Zhang, Nailong He, Shiyao Cai, Yuxiao Kun, Jiangnan Mu, Zhekai Hu, Ting Wang, Ziao Zhang,...