Analog and Mixed Signal Circuits Session
Session Type: Lecture
Session Code: C4L-A
Location: Room 1
Date & Time: Wednesday June 24, 2026 (15:00 - 16:30)
Chair: Wilfried Uhring,
Martin Otis

 

    Papers are listed in the order they will be presented.

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My Sched		Paper
Id		TopicTitle/Author
4054 1 Ferroelectric FET-Based Reconfigurable Voltage-to-Time Converter in 28 nm CMOS
Hanaa Eqeiq, Jeries Mattar, Stefan Dünkel, Halid Mulaosmanovic, Gunda Beernink, Sven Beyer, Nicolas Wainstein
4090 1 A Process-Robust Compute-in-Memory Macro with a Feedback-Compensated DAC for Multi-Bit Dot-Product Computation
Koush Rastogi, Bhupendra Reniwal
4152 1 A 16-Gb/s NRZ CTLE with a Wide Tuning Range Using a Voltage Boosting Active Inductor in 28-nm FDSOI CMOS
Junyoung Choi, Hyunseok Kim, Taewon Kwak, Minho Kang, Cheolmin Park, Jun Yeon Won, Jaeduk Han
4225 1 A 2.27 µA Ripple-Less & Capless Hybrid LDO with Adaptive Clocking for Low-Power SOCs
M. Saad Munawar, Shirin Qaisar, Muhammad Haris Farooq, Qurat Ul Ain, Hammad M. Cheema