Digital Circuits and Systems Session
Session Type: Lecture
Session Code: B1L-C
Location: Room 3
Date & Time: Tuesday June 23, 2026 (08:30 - 10:00)
Chair: Xu Wang,
Tarek Bashir

 

    Papers are listed in the order they will be presented.

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My Sched		Paper
Id		TopicTitle/Author
4056 3 Reducing Memory Accesses and Computing Energy with RISC-V Custom Load/Store Instructions
Filipe Pouget, Joaquin Cornejo, Sylvain Clerc, Camille Leroux, Christophe Jego
4061 3 ApexHDL: A Tool for Generating/Benchmarking Unary and Binary Function Evaluators on FPGA
Florian Delhon, Kevin Peymani, Tarek Ould-Bachir
4101 3 A Novel Node- and Layout-Aware Radiation-Hardened 7 nm D Flip-Flop
Aobo Cui, Eleonora Vacca, Sarah Azimi, Luca Sterpone
4174 3 Graph Canonization for Efficient Pattern Reuse in ReRAM-Based Graph Accelerators
Masoud Rahimi, Sébastien Le Beux
4217 3 Single-Precision Iterative Refinement Floating-Point Power Electronics Simulation for FPGA Versal Platforms
Jérémy Poupart, Manouane Caza-Szoka, Michel Lemaire, Daniel Massicotte