ASSCC 2025 Lecture Session Schedule
Time Room 1 Room 2 Room 3 Room 4
Monday
Nov 3rd, 2025
14:00-15:40
A1L-A
Advanced System Integration Circuits (4 papers)
Chr: Jinho Han, Saki Hatta
Track: 10
A1L-B
Switching-Based Power Converters (4 papers)
Chr: Makoto Takamiya, Kunhee Cho
Track: 1
A1L-C
Domain Specific Accelerators (4 papers)
Chr: Aoyang Zhang, Yan Li
Track: 3
A1L-D
Wireless Powering & Stimulation Systems for Implants (4 papers)
Chr: Bo Zhao, Jaeeun Jang
Track: 7
Monday
Nov 3rd, 2025
16:00-17:40
A2L-A
Monitoring, Regulation, and References (5 papers)
Chr: Paras Garg, Pieter Harpe
Track: 1
A2L-B
High-Performance Frequency Generation (4 papers)
Chr: Jaehyouk Choi, minjae lee
Track: 5
A2L-C
Application-Driven FPGA Circuits and Systems (4 papers)
Chr: Youngjoo Lee, Seokhyeong Kang
Track: 9
 
Monday
Nov 3rd, 2025
16:00-18:00
   A2L-D
AI Accelerators and Security Circuits (6 papers)
Chr: Jun Seok Park, Fengbin Tu
Track: 4
Tuesday
Nov 4th, 2025
10:50-12:30
B1L-A
High Precision ADCs (5 papers)
Chr: Xiyuan Tang, Chih-Cheng Hsieh
Track: 2
B1L-B
Low-Power Transceivers (4 papers)
Chr: Kuang-Wei Cheng, Jusung Kim
Track: 5
B1L-C
Advanced Digital Comput-In-Memory For Edge AI (4 papers)
Chr: Bo Wang, Anh Tuan Do
Track: 8
B1L-D
Ultra High-Speed Transceivers (4 papers)
Chr: Il-Min Yi, Pen-Jui Peng
Track: 6
Tuesday
Nov 4th, 2025
14:00-15:40
B2L-A
Phased-Array System and Components (5 papers)
Chr: Hao Gao, Chien-Nan Kuo
Track: 5
B2L-B
Hybrid DC-DC Converters (4 papers)
Chr: Hirshi Fuketa, Ming-Yan Fan
Track: 1
B2L-C
Techniques for Emerging Hardware Accelerators (5 papers)
Chr: Xuanyao Fong, Bongjin Kim
Track: 3
B2L-D
Oscillators (4 papers)
Chr: Mustafijur Rahman, Minoru Fujishima
Track: 5
Wednesday
Nov 5th, 2025
09:00-10:40
C1L-A
Visual Interactive System (4 papers)
Chr: Yongfu Li, Chihiro Okada
Track: 7
C1L-B
Energy-Harvesting and Amplifiers (5 papers)
Chr: Hyun-Sik Kim, Sai-Weng Sin
Track: 1
C1L-C
High-speed, High-resolution SAR and Pipelined ADCs (5 papers)
Chr: Hyungil Chae, Chi-Hang Chan
Track: 2
C1L-D
Circuits for Cognitive and Physiological Interfaces (5 papers)
Chr: Jiamin Li, Wanyeong Jung
Track: 7
Wednesday
Nov 5th, 2025
11:00-12:40
C2L-A
AI Accelerators (5 papers)
Chr: Sungju Ryu, Yang Hu
Track: 3
C2L-B
Advanced Timing Recovery (5 papers)
Chr: Wei Deng, Kwanseo Park
Track: 6
C2L-C
High Performance ADCs (5 papers)
Chr: Gain Kim, Takashi Oshima
Track: 2
C2L-D
Advanced Circuits for Memory and Sensing (5 papers)
Chr: Yi-Chung Wu, Jongwoo Lee
Track: 7
Wednesday
Nov 5th, 2025
14:00-15:40
C3L-A
Energy Efficient Mixed Signal CIM Circuits (5 papers)
Chr: Xin Si, Chixiao Chen
Track: 8
C3L-B
Analog and Digital Interfaces (4 papers)
Chr: Sining Pan, Nan Qi
Track: 1
C3L-C
Precise and Robust Biomedical Interfaces (4 papers)
Chr: Min-Jae Seo, Taekwang Jang
Track: 1
C3L-D
High Speed Circuit and Interface for Memory (4 papers)
Chr: Joo-Hyung Chae, YooChang Sung
Track: 8
Wednesday
Nov 5th, 2025
16:00-17:40
C4L-A
Advanced Transceivers (5 papers)
Chr: Yuxuan Luo, Kenichi Okada
Track: 5
C4L-B
Circuits and Systems for Quantum and Security (4 papers)
Chr: Hsiao-Chin Chen, Seungkyu Choi
Track: 7