ASSCC 2026 Lecture Session Schedule
Time Room 1 Room 2 Room 3 Room 4 Room 5
Monday
Nov 2nd, 2026
09:10-10:40
A0L-A
PLENARY I & II (0 papers)
Chr: TBA
Track: 11
    
Monday
Nov 2nd, 2026
14:00-15:40
 A1L-B
Analog Techniques (4 papers)
Chr: Paras Garg, Pieter Harpe
Track: 1
A1L-C
Advanced Frequency Generation Techniques (5 papers)
Chr: Kuang-Wei Cheng, Mike Shuo-Wei Chen
Track: 5
A1L-D
Domain-Specific Accelerators (5 papers)
Chr: Koyo Nitta, Bongjin Kim
Track: 3
A1L-E
CT and Pipelined ADCs (4 papers)
Chr: Chan-Hsiang Weng, Shiyu Su
Track: 2
Monday
Nov 2nd, 2026
16:00-17:40
 A2L-B
Intelligent Edge Sensing and AI Systems (4 papers)
Chr: Kea-Tiong Tang, Takuji Miki
Track: 7
A2L-C
Transmitter RF Front Ends (4 papers)
Chr: Hsieh-Hung Hsieh, Yuxuan Luo
Track: 5
A2L-D
Advanced Clocking Techniques (4 papers)
Chr: Ping-Hsuan Hsieh, Takayasu Norimatsu
Track: 6
A2L-E
Advanced Memory Circuits and CIM for AI (5 papers)
Chr: E-Ray Hsieh, Bokyung Kim
Track: 8
Tuesday
Nov 3rd, 2026
09:00-10:30
B0L-A
PLENARY III & IV (0 papers)
Chr: TBA
Track: 11
    
Tuesday
Nov 3rd, 2026
10:50-12:30
 B1L-B
High-Speed Interfaces and Emerging Computing (4 papers)
Chr: Noriyuki Miura, Jongwoo Lee
Track: 7
B1L-C
Energy Harvesting Circuits (4 papers)
Chr: Makoto Takamiya, Ming-Yan Fan
Track: 1
B1L-D
Energy-Efficient and Secure Digital Circuits (5 papers)
Chr: Yoonmyung Lee, Mototsugu Hamada
Track: 3
B1L-E
AI Accelerators and Hardware Security (4 papers)
Chr: Kun-Chih Chen, Chao-Tsung Huang
Track: 4
Tuesday
Nov 3rd, 2026
14:00-15:40
 B2L-B
Fast Response DC-DC Converters (4 papers)
Chr: Ching-Jan Chen, Hiroshi Fuketa
Track: 1
B2L-C
Advanced Power Amplifiers and AI-assisted RF Front Ends (4 papers)
Chr: Yuan-Hung Chung, Hua Wang
Track: 5
B2L-D
Advanced Wireline Receivers and Transceivers (4 papers)
Chr: Takeshi Kuboki, Shih-Hsiung Huang
Track: 6
B2L-E
High-speed Analog-to-Digital Converters (4 papers)
Chr: Hsin-Shu Chen, Hyungil Chae
Track: 2
Wednesday
Nov 4th, 2026
09:00-10:40
C1L-A
Isolated DC-DC Converters and Power Control (5 papers)
Chr: Kang Wei, Kunhee Cho
Track: 1
C1L-B
High-Performance Wireless Transceiver and System (4 papers)
Chr: Jusung Kim, Hao Gao
Track: 5
C1L-C
Ultra-High-Speed Wireline Transmitters (4 papers)
Chr: Pen-Jui Peng, Huaide Wang
Track: 6
C1L-D
Domain-Specific FPGA Circuits: Robotics, LLMs, Cryptography, and Wireline (5 papers)
Chr: Ren-Shuo Liu, Atsutake Kosuge
Track: 9
C1L-E
Industrial Interface and Implementation Techniques (4 papers)
Chr: Takayuki Miyazaki, Bor-Sung Liang
Track: 10
Wednesday
Nov 4th, 2026
10:50-12:30
C2L-A
Sub-THz & Millimeter-wave Transceivers & Front-end Blocks (4 papers)
Chr: Mustafijur Rahman, Haikun Jia
Track: 5
C2L-B
Sensor Interface Circuits (5 papers)
Chr: Min-Jae Seo, Matthias Eberlein
Track: 1
C2L-C
Emerging Sensors and Biomedical Interfaces (5 papers)
Chr: Inhee Lee, Jaeeun Jang
Track: 7
C2L-D
Bi-directional Transceivers for Memory and Die-to-Die Interfaces (4 papers)
Chr: Joo-Hyung Chae, Takefumi Yoshikawa
Track: 6
C2L-E
Compute-in-Memory Based AI Accelerators (5 papers)
Chr: Jun-Seok Park, Jenwei Liang
Track: 4
Wednesday
Nov 4th, 2026
14:00-15:40
C3L-A
Switched-Capacitor & Hybrid Converters (4 papers)
Chr: Yi-Wei Huang, Hyun-Sik Kim
Track: 1
C3L-B
Advanced PLLs for Wireless Transceivers (4 papers)
Chr: Teerachot Siriburanon, Keigo Bunsen
Track: 5
C3L-C
Power and Wireless Systems (4 papers)
Chr: Wanyeong Jung, Hsiao-Chin Chen
Track: 7
C3L-D
Wideband ADC and DAC Techniques (4 papers)
Chr: Chi-Hang Chan, Seunghyun Oh
Track: 2
C3L-E
FPGA Circuits and Systems for Vision (4 papers)
Chr: Bo-Cheng Lai, Yoshiki Yamaguchi
Track: 9
Wednesday
Nov 4th, 2026
16:00-17:40
C4L-A
Vision, SPAD and LiDAR Sensors (5 papers)
Chr: Yi-Chung Wu, Yongfu Li
Track: 7
C4L-B
High precision ADCs (3 papers)
Chr: Chih-Cheng Hsieh, Hanyue Li
Track: 2
C4L-C
High Performance and Energy-Efficient Processors (5 papers)
Chr: Sungju Ryu , Tsung-Han Tsai
Track: 3
C4L-D
High Speed DRAM and HBM (4 papers)
Chr: Ho-Yin Chen, Yoochang Sung
Track: 8